Please join us for a UW Data Science Seminar event on Wednesday, May 8th from 4:30 to 5:20 p.m. PDT. The seminar will feature Ang Li, Assistant Professor of Electrical and Computer Engineering at UW.
The seminar will be held in the Physics/Astronomy Auditorium (PAA), Room A118 – campus map.
“Tightly Integrated, Programmable Hardware Acceleration”
Abstract:
The slow-down of Moore’s law and transistor performance scaling have motivated specialized hardware accelerators that sacrifice generality for higher performance and efficiency. Commodity accelerators (GPUs, FPGAs, etc.) that are attached to PCIe buses or connected over large networks have successfully accelerated several important applications such as artificial intelligence, genome sequencing, etc. However, the vast majority of applications cannot be easily accelerated with these systems due to the dynamic, irregular control flows and data movements. Addressing this challenge, my research studies tightly integrated, programmable accelerators that have very low communication overhead with the CPU processors (i.e., system-on-chip). This enables a new computing paradigm called fine-grained acceleration, which partitions an algorithm at function or loop body level, executes each fragment on the most suitable processing unit, and minimizes the communication and orchestration overhead with novel hardware/software mechanisms.
Biography:
Ang Li (he/his) is an Assistant Professor of Electrical and Computer Engineering at UW. He earned his B.Sc. in Electrical Engineering from Tsinghua University, his M.A. in Electrical Engineering from Princeton University, and his Ph.D. in Electrical and Computer Engineering from Princeton University. He directs the PN Computer Engineering Lab (PNCEL), which innovates from computing systems to semiconductor circuits and explores the interplay between classic and emerging computing technologies.
In his doctoral research, Dr. Li has developed a silicon-proven, open-source, FPGA research and prototyping framework (PRGA) and studied tightly integrated, manycore-eFPGA, system-on-chip (SoC) architectures. He has been a leading member in two multi-university teams who successfully taped out, brought up, and evaluated two silicon prototypes, including a 2.2-billion-transistor, Linux-capable, fully cache-coherent, manycore-accelerator-eFPGA SoC, which is one of the biggest academic tape-outs to date.
The UW Data Science Seminar is an annual lecture series at the University of Washington that hosts scholars working across applied areas of data science, such as the sciences, engineering, humanities and arts along with methodological areas in data science, such as computer science, applied math and statistics. Our presenters come from all domain fields and include occasional external speakers from regional partners, governmental agencies and industry.